CPU DB

MIPS R5000

180.0 MHz

Specifications
Designer MIPS
Family R5000
Model
Code Name
Clock [MHz] 180.0
Max Clock (Turbo) [MHz]
Physical Details
Voltage (Nom.) [V] 3.30
TDP [W]
Die Size [mm²] 84
Transistor [M] 3.6
Architecture
Data Path Width 64
Cores per Chip 1
Threads per Core 1
Microarchitecture
µarch R5000
ISA
FP Pipe Stages
Int Pipe Stages 5
Cache (on-chip)
L1 Unified Cache
L1 Instruction Cache 32
L1 Data Cache 32
L2 Cache 512
L3 Cache
Cache (off-chip)
L1 Unified Cache
L1 Instruction Cache
L1 Data Cache
L2 Cache
L3 Cache
Process Technology
Fabricated By IDT
Process http://cpudb.stanford.edu/technologies/50
Technology CMOS
Feature Size [μm] 0.35
Channel Length [μm] 0.35
Metal Layers 3
Metal Type aluminum
FO4 Delay [ps] 126.0

    SpecInt1995

    Go M88ksim Gcc Compress Li Ijpeg Perl Vortex
    3.7 4.9 3.8 3.0 4.6 4.2 5.5 3.6 source
    2.9 4.9 3.2 2.4 4.2 4.2 5.3 2.9 source
    4.8 5.2 4.7 3.5 5.0 4.6 6.6 4.3 source
    4.9 4.6 5.1 4.2 5.3 4.4 6.5 4.7 source
    5.0 4.5 5.1 4.0 5.1 4.4 6.8 4.7 source
    4.5 4.7 5.1 5.0 5.3 4.5 6.4 4.1 source
    5.0 4.6 4.8 4.6 4.5 4.3 6.2 3.9 source
    4.9 4.6 5.1 4.2 5.3 4.4 6.5 4.7 source

    SpecFp1995

    Tomcatv Swim Su2cor Hydro2d Mgrid Applu Turb3d Apsi Fpppp Wave5
    6.2 8.9 1.9 2.1 4.1 3.6 4.7 4.7 14.9 5.2 source
    6.8 10.4 1.9 2.5 4.4 4.0 4.3 4.4 8.0 4.2 source
    7.4 10.4 2.3 2.5 5.0 4.2 5.6 5.5 10.2 6.6 source