Microarchitecture | |
---|---|
µarch | PowerPC 601 |
ISA | |
FP Pipe Stages | 6 |
Int Pipe Stages | 4 |
Additional Specifications | |
---|---|
ISA Extensions | |
Max µops (per-cycle) | 3 |
IFU | 1 |
LSFU | 0 |
FPFU | 1 |
TFU | 3 |
Max Inst. Decoded | 3 |
ROB Size | |
Inst. Window | |
IF Queue | 8 |
Additional Specifications | |
---|---|
BHT Size | |
BTB Size | |
BP Acc | |
Registers (INT) | |
Registers (FP) | |
Registers (All) | |
Memory BW [MB/s] | |
Out of Order | |
Integrated Memory Ctrl |
Designer | Family | Code Name | Model | μarch | Released | Cache | Vdd | Feature Size | FO4 | Clock | TDP | SPECInt 1992 | SPECFp 1992 | SPECInt 1995 | SPECFp 1995 | SPECInt 2000 | SPECFp 2000 | SPECInt 2006 | SPECFp 2006 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
IBM | PowerPC 601 | PowerPC 601 | 1993-04-01 | 32 | 3.60 | 0.6 | 216.0 | 66.0 | 6.5 | 55.9 | 66.6 | 1.7 | 2.2 | details | ||||||
IBM | PowerPC 601 | PowerPC 601 | 1993-04-01 | 32 | 3.60 | 0.6 | 216.0 | 75.0 | 6.5 | 68.4 | 80.2 | details | ||||||||
IBM | PowerPC 601 | PowerPC 601 | 32 | 3.60 | 0.6 | 216.0 | 80.0 | 2.4 | 3.0 | details |