| Microarchitecture | |
|---|---|
| µarch | UltraSPARC III |
| ISA | |
| FP Pipe Stages | 7 |
| Int Pipe Stages | 14 |
| Additional Specifications | |
|---|---|
| ISA Extensions | |
| Max µops (per-cycle) | 4 |
| IFU | 2 |
| LSFU | 1 |
| FPFU | 4 |
| TFU | 8 |
| Max Inst. Decoded | 4 |
| ROB Size | |
| Inst. Window | 6 |
| IF Queue | 20 |
| Additional Specifications | |
|---|---|
| BHT Size | 16384 |
| BTB Size | 4 |
| BP Acc | |
| Registers (INT) | 32 |
| Registers (FP) | 32 |
| Registers (All) | 0 |
| Memory BW [MB/s] | 2400 |
| Out of Order | false |
| Integrated Memory Ctrl | |
| Designer | Family | Code Name | Model | μarch | Cache | Vdd | Feature Size | FO4 | Clock | TDP | |
|---|---|---|---|---|---|---|---|---|---|---|---|
| Sun | UltraSPARC III | Cheetah | UltraSPARC III | 96 | 1.60 | 0.13 | 25.2 | 750.0 | details | ||
| Sun | UltraSPARC III | Cheetah | UltraSPARC III | 96 | 1.70 | 0.13 | 25.2 | 900.0 | details |