| Microarchitecture | |
|---|---|
| µarch | Power6 |
| ISA | |
| FP Pipe Stages | 19 |
| Int Pipe Stages | 14 |
| Additional Specifications | |
|---|---|
| ISA Extensions | |
| Max µops (per-cycle) | 5 |
| IFU | 2 |
| LSFU | 2 |
| FPFU | 2 |
| TFU | 8 |
| Max Inst. Decoded | 8 |
| ROB Size | |
| Inst. Window | 48 |
| IF Queue | |
| Additional Specifications | |
|---|---|
| BHT Size | |
| BTB Size | |
| BP Acc | |
| Registers (INT) | |
| Registers (FP) | |
| Registers (All) | |
| Memory BW [MB/s] | |
| Out of Order | false |
| Integrated Memory Ctrl | |
| Designer | Family | Code Name | Model | μarch | Released | Cache | Vdd | Feature Size | FO4 | Clock | TDP | SPECInt 1992 | SPECFp 1992 | SPECInt 1995 | SPECFp 1995 | SPECInt 2000 | SPECFp 2000 | SPECInt 2006 | SPECFp 2006 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| IBM | Power6 | Power6 | 2007-05-01 | 8192 | 1.00 | 0.065 | 14.8 | 3500.0 | 160.0 | details | ||||||||||
| IBM | Power6 | Power6 | 2007-05-01 | 8192 | 1.00 | 0.065 | 14.8 | 3800.0 | 160.0 | details | ||||||||||
| IBM | Power6 | Power6 | 2007-05-01 | 8192 | 1.00 | 0.065 | 14.8 | 4200.0 | 160.0 | details | ||||||||||
| IBM | Power6 | Power6 | 2007-05-01 | 8192 | 1.00 | 0.065 | 14.8 | 4700.0 | 160.0 | details | ||||||||||
| IBM | Power6 | Power6 | 2007-05-01 | 8192 | 1.00 | 0.065 | 14.8 | 5000.0 | 160.0 | details |