IBM Power7 µarch
Microarchitecture |
µarch |
Power7 |
ISA |
|
FP Pipe Stages |
|
Int Pipe Stages |
|
Additional Specifications
|
ISA Extensions |
|
Max µops (per-cycle) |
|
IFU |
|
LSFU |
|
FPFU |
|
TFU |
|
Max Inst. Decoded |
|
ROB Size |
|
Inst. Window |
|
IF Queue |
|
Additional Specifications
|
BHT Size |
|
BTB Size |
|
BP Acc |
|
Registers (INT) |
|
Registers (FP) |
|
Registers (All) |
|
Memory BW [MB/s] |
|
Out of Order |
|
Integrated Memory Ctrl |
|
Designer |
Family |
Code Name |
Model |
μarch |
Released |
Cache |
Vdd |
Feature Size |
FO4 |
Clock |
TDP |
SPECInt 1992 |
SPECFp 1992 |
SPECInt 1995 |
SPECFp 1995 |
SPECInt 2000 |
SPECFp 2000 |
SPECInt 2006 |
SPECFp 2006 |
|
IBM |
Power7
|
|
|
Power7
|
2010-02-01 |
32768 |
|
0.045 |
9.0
|
3550.0 |
200.0 |
|
|
|
|
|
|
|
|
details |
IBM |
Power7
|
|
|
Power7
|
2010-02-01 |
24576 |
|
0.045 |
9.0
|
3700.0 |
200.0 |
|
|
|
|
|
|
|
|
details |