CPU DB

MIPS R8000 µarch

Microarchitecture
µarch R8000
ISA
FP Pipe Stages
Int Pipe Stages 5
Additional Specifications
ISA Extensions
Max µops (per-cycle) 4
IFU 4
LSFU 2
FPFU
TFU 6
Max Inst. Decoded 4
ROB Size
Inst. Window
IF Queue
Additional Specifications
BHT Size 1024
BTB Size
BP Acc
Registers (INT) 32
Registers (FP) 32
Registers (All) 64
Memory BW [MB/s]
Out of Order
Integrated Memory Ctrl

Designer Family Code Name Model μarch Released Cache Vdd Feature Size FO4 Clock TDP SPECInt 1992 SPECFp 1992 SPECInt 1995 SPECFp 1995 SPECInt 2000 SPECFp 2000 SPECInt 2006 SPECFp 2006
MIPS R8000 R8000 R8000 1994-06-07 32 3.30 0.7 252.0 75.0 13.0 102.6 266.2 details
MIPS R8000 R8010 R8000 1994-06-07 32 3.30 0.7 252.0 75.0 13.0 details