Sun UltraSPARC T1 µarch
Microarchitecture |
µarch |
UltraSPARC T1 |
ISA |
|
FP Pipe Stages |
7 |
Int Pipe Stages |
6 |
Additional Specifications
|
ISA Extensions |
|
Max µops (per-cycle) |
1 |
IFU |
|
LSFU |
|
FPFU |
|
TFU |
|
Max Inst. Decoded |
1 |
ROB Size |
|
Inst. Window |
8 |
IF Queue |
|
Additional Specifications
|
BHT Size |
|
BTB Size |
|
BP Acc |
|
Registers (INT) |
|
Registers (FP) |
|
Registers (All) |
|
Memory BW [MB/s] |
|
Out of Order |
false |
Integrated Memory Ctrl |
|
Designer |
Family |
Code Name |
Model |
μarch |
Released |
Cache |
Vdd |
Feature Size |
FO4 |
Clock |
TDP |
SPECInt 1992 |
SPECFp 1992 |
SPECInt 1995 |
SPECFp 1995 |
SPECInt 2000 |
SPECFp 2000 |
SPECInt 2006 |
SPECFp 2006 |
|
Sun |
UltraSPARC T1
|
Niagara
|
|
UltraSPARC T1
|
2005-07-01 |
3072 |
1.10 |
0.09 |
19.1
|
1400.0 |
72.0 |
|
|
|
|
|
|
|
|
details |