CPU DB

IBM PowerPC 630 µarch

Microarchitecture
µarch PowerPC 630
ISA
FP Pipe Stages 10
Int Pipe Stages 7
Additional Specifications
ISA Extensions
Max µops (per-cycle) 4
IFU 3
LSFU 2
FPFU 2
TFU 7
Max Inst. Decoded 8
ROB Size 32
Inst. Window 23
IF Queue
Additional Specifications
BHT Size 2048
BTB Size
BP Acc
Registers (INT)
Registers (FP)
Registers (All)
Memory BW [MB/s]
Out of Order true
Integrated Memory Ctrl

Designer Family Code Name Model μarch Released Cache Vdd Feature Size FO4 Clock TDP SPECInt 1992 SPECFp 1992 SPECInt 1995 SPECFp 1995 SPECInt 2000 SPECFp 2000 SPECInt 2006 SPECFp 2006