| Specifications | |
|---|---|
| Designer | Sun |
| Family | UltraSPARC IIIi |
| Model | |
| Code Name | Jalepeno |
| Clock [MHz] | 1600.0 |
| Max Clock (Turbo) [MHz] | |
| Physical Details | |
|---|---|
| Voltage (Nom.) [V] | 1.30 |
| TDP [W] | 52.0 |
| Die Size [mm²] | 206 |
| Transistor [M] | 87.5 |
| Architecture | |
|---|---|
| Data Path Width | 64 |
| Cores per Chip | 1 |
| Threads per Core | 1 |
| Cache (on-chip) | |
|---|---|
| L1 Unified Cache | |
| L1 Instruction Cache | 32 |
| L1 Data Cache | 64 |
| L2 Cache | 1024 |
| L3 Cache | |
| Cache (off-chip) | |
|---|---|
| L1 Unified Cache | |
| L1 Instruction Cache | |
| L1 Data Cache | |
| L2 Cache | |
| L3 Cache | |
| Process Technology | |
|---|---|
| Fabricated By | TI |
| Process | http://cpudb.stanford.edu/technologies/103 |
| Technology | CMOS |
| Feature Size [μm] | 0.13 |
| Channel Length [μm] | |
| Metal Layers | 7 |
| Metal Type | copper |
| FO4 Delay [ps] | 25.2 |
| Gzip | Vpr | Gcc | Mcf | Crafty | Parser | Eon | Perlbmk | Gap | Vortex | Bzip2 | Twolf | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 708.0 | 632.0 | 735.0 | 361.0 | 875.0 | 650.0 | 1035.0 | 807.0 | 647.0 | 1389.0 | 659.0 | 796.0 | source |
| 707.0 | 638.0 | 751.0 | 375.0 | 873.0 | 655.0 | 1034.0 | 791.0 | 647.0 | 1388.0 | 664.0 | 802.0 | source |
| 744.0 | 650.0 | 756.0 | 441.0 | 992.0 | 660.0 | 1065.0 | 874.0 | 656.0 | 1434.0 | 677.0 | 805.0 | source |
| Wupwise | Swim | Mgrid | Applu | Mesa | Galgel | Art | Equake | Facerec | Ammp | Lucas | Fma3d | Sixtrack | Apsi | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1328.0 | 986.0 | 786.0 | 989.0 | 891.0 | 2140.0 | 11144.0 | 1737.0 | 1877.0 | 589.0 | 916.0 | 674.0 | 541.0 | 922.0 | source |
| 1410.0 | 987.0 | 786.0 | 994.0 | 897.0 | 2083.0 | 11377.0 | 1742.0 | 1908.0 | 592.0 | 927.0 | 681.0 | 539.0 | 923.0 | source |
| 1422.0 | 1907.0 | 772.0 | 1120.0 | 893.0 | 2139.0 | 11283.0 | 1739.0 | 1908.0 | 587.0 | 884.0 | 706.0 | 587.0 | 919.0 | source |