Specifications | |
---|---|
Designer | Sun |
Family | UltraSPARC IIIi |
Model | |
Code Name | Jalepeno |
Clock [MHz] | 1280.0 |
Max Clock (Turbo) [MHz] |
Physical Details | |
---|---|
Voltage (Nom.) [V] | 1.30 |
TDP [W] | 52.0 |
Die Size [mm²] | 206 |
Transistor [M] | 87.5 |
Architecture | |
---|---|
Data Path Width | 64 |
Cores per Chip | 1 |
Threads per Core | 1 |
Cache (on-chip) | |
---|---|
L1 Unified Cache | |
L1 Instruction Cache | 32 |
L1 Data Cache | 64 |
L2 Cache | 1024 |
L3 Cache |
Cache (off-chip) | |
---|---|
L1 Unified Cache | |
L1 Instruction Cache | |
L1 Data Cache | |
L2 Cache | |
L3 Cache |
Process Technology | |
---|---|
Fabricated By | TI |
Process | http://cpudb.stanford.edu/technologies/103 |
Technology | CMOS |
Feature Size [μm] | 0.13 |
Channel Length [μm] | |
Metal Layers | 7 |
Metal Type | copper |
FO4 Delay [ps] | 25.2 |
Gzip | Vpr | Gcc | Mcf | Crafty | Parser | Eon | Perlbmk | Gap | Vortex | Bzip2 | Twolf | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
541.0 | 520.0 | 666.0 | 329.0 | 726.0 | 534.0 | 804.0 | 670.0 | 523.0 | 969.0 | 557.0 | 654.0 | source |
541.0 | 526.0 | 676.0 | 338.0 | 725.0 | 535.0 | 808.0 | 682.0 | 528.0 | 1060.0 | 558.0 | 652.0 | source |
542.0 | 526.0 | 676.0 | 337.0 | 724.0 | 534.0 | 801.0 | 680.0 | 529.0 | 1053.0 | 557.0 | 652.0 | source |
Wupwise | Swim | Mgrid | Applu | Mesa | Galgel | Art | Equake | Facerec | Ammp | Lucas | Fma3d | Sixtrack | Apsi | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
945.0 | 920.0 | 664.0 | 753.0 | 705.0 | 1411.0 | 7698.0 | 1392.0 | 1126.0 | 457.0 | 382.0 | 557.0 | 440.0 | 713.0 | source |
959.0 | 975.0 | 700.0 | 769.0 | 707.0 | 1524.0 | 7691.0 | 1493.0 | 1099.0 | 467.0 | 882.0 | 561.0 | 436.0 | 744.0 | source |
963.0 | 975.0 | 703.0 | 766.0 | 705.0 | 1512.0 | 7760.0 | 1493.0 | 1099.0 | 469.0 | 877.0 | 563.0 | 436.0 | 743.0 | source |