Specifications | |
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Designer | Fujitsu |
Family | microSPARC II |
Model | |
Code Name | Swift |
Clock [MHz] | 70.0 |
Max Clock (Turbo) [MHz] |
Physical Details | |
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Voltage (Nom.) [V] | 3.30 |
TDP [W] | |
Die Size [mm²] | 233 |
Transistor [M] | 2.3 |
Architecture | |
---|---|
Data Path Width | 32 |
Cores per Chip | 1 |
Threads per Core | 1 |
Cache (on-chip) | |
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L1 Unified Cache | |
L1 Instruction Cache | 2 |
L1 Data Cache | 8 |
L2 Cache | |
L3 Cache |
Cache (off-chip) | |
---|---|
L1 Unified Cache | |
L1 Instruction Cache | |
L1 Data Cache | |
L2 Cache | |
L3 Cache |
Process Technology | |
---|---|
Fabricated By | Fujitsu |
Process | http://cpudb.stanford.edu/technologies/19 |
Technology | CMOS |
Feature Size [μm] | 0.5 |
Channel Length [μm] | 0.5 |
Metal Layers | 3 |
Metal Type | |
FO4 Delay [ps] | 180.0 |