CPU DB

DEC Alpha 21164

EV5, 266.0 MHz

Specifications
Designer DEC
Family Alpha 21164
Model
Code Name EV5
Clock [MHz] 266.0
Max Clock (Turbo) [MHz]
Physical Details
Voltage (Nom.) [V] 3.30
TDP [W] 46.0
Die Size [mm²] 299
Transistor [M] 9.3
Architecture
Data Path Width 64
Cores per Chip 1
Threads per Core 1
Microarchitecture
µarch EV5
ISA Alpha
FP Pipe Stages 9
Int Pipe Stages 7
Cache (on-chip)
L1 Unified Cache
L1 Instruction Cache 8
L1 Data Cache 8
L2 Cache 96
L3 Cache
Cache (off-chip)
L1 Unified Cache
L1 Instruction Cache
L1 Data Cache
L2 Cache
L3 Cache 2048
Process Technology
Fabricated By DEC
Process CMOS-5
Technology CMOS
Feature Size [μm] 0.5
Channel Length [μm] 0.5
Metal Layers 4
Metal Type
FO4 Delay [ps] 180.0

    Die Photo

    164

SpecInt1992

Espresso Li Eqntott Compress Sc Gcc
222.5 224.2 366.7 141.3 580.8 192.3 source
231.6 234.3 379.3 147.3 588.3 197.8 source
236.5 242.6 478.3 140.6 566.3 210.0 source

SpecFp1992

Spice2g6 Doduc Mdljdp2 Wave5 Tomcatv Ora Alvinn Ear Mdljsp2 Swm256 Su2cor Hydro2d Nasa7 Fpppp
184.3 315.3 322.3 256.9 389.7 317.1 630.3 1000.0 189.3 216.7 558.4 424.1 400.0 511.1 source
173.9 304.9 317.9 266.2 378.6 328.3 625.2 1007.9 189.3 199.4 528.7 413.9 431.9 541.2 source

SpecInt1995

Go M88ksim Gcc Compress Li Ijpeg Perl Vortex
8.0 6.4 6.1 5.9 6.2 6.1 7.1 6.7 source
8.6 6.4 6.2 5.9 6.1 6.1 7.0 6.8 source
6.9 6.4 6.1 5.9 6.0 6.1 6.7 6.6 source
8.8 6.2 5.5 5.7 5.7 6.1 6.5 6.4 source
8.6 6.5 5.7 5.9 5.8 6.2 6.6 6.6 source

SpecFp1995

Tomcatv Swim Su2cor Hydro2d Mgrid Applu Turb3d Apsi Fpppp Wave5
14.8 16.5 6.4 5.5 8.3 5.6 10.5 11.2 20.4 14.3 source
15.8 17.3 6.8 7.2 8.9 5.8 10.6 11.2 20.4 14.8 source
13.6 17.9 5.8 5.6 8.1 5.9 9.9 11.9 18.7 12.3 source
14.1 18.2 6.3 7.2 8.6 6.1 10.0 12.0 18.8 13.3 source