| Microarchitecture | |
|---|---|
| µarch | EV5 |
| ISA | Alpha |
| FP Pipe Stages | 9 |
| Int Pipe Stages | 7 |
| Additional Specifications | |
|---|---|
| ISA Extensions | |
| Max µops (per-cycle) | 4 |
| IFU | 2 |
| LSFU | 2 |
| FPFU | 2 |
| TFU | 4 |
| Max Inst. Decoded | 4 |
| ROB Size | |
| Inst. Window | |
| IF Queue | |
| Additional Specifications | |
|---|---|
| BHT Size | 4096 |
| BTB Size | |
| BP Acc | |
| Registers (INT) | 32 |
| Registers (FP) | 32 |
| Registers (All) | 32 |
| Memory BW [MB/s] | 1200 |
| Out of Order | false |
| Integrated Memory Ctrl | |
| Designer | Family | Code Name | Model | μarch | Released | Cache | Vdd | Feature Size | FO4 | Clock | TDP | SPECInt 1992 | SPECFp 1992 | SPECInt 1995 | SPECFp 1995 | SPECInt 2000 | SPECFp 2000 | SPECInt 2006 | SPECFp 2006 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| DEC | Alpha 21164 | EV5 | EV5 | 1994-09-07 | 96 | 3.30 | 0.5 | 180.0 | 250.0 | 46.0 | 244.8 | 356.4 | 6.0 | 8.4 | details | |||||
| DEC | Alpha 21164 | EV5 | EV5 | 1994-09-07 | 96 | 3.30 | 0.5 | 180.0 | 266.0 | 46.0 | 266.8 | 363.8 | 6.4 | 10.5 | details | |||||
| DEC | Alpha 21164 | EV5 | EV5 | 1994-09-07 | 96 | 3.30 | 0.5 | 180.0 | 291.0 | 51.0 | 283.6 | 420.0 | 7.0 | 9.3 | details | |||||
| DEC | Alpha 21164 | EV5 | EV5 | 1994-09-07 | 96 | 3.30 | 0.5 | 180.0 | 300.0 | 51.0 | 302.4 | 441.4 | 7.2 | 11.1 | details | |||||
| DEC | Alpha 21164 | EV5 | EV5 | 1994-09-07 | 96 | 3.30 | 0.5 | 180.0 | 333.0 | 56.0 | 335.4 | 470.4 | 8.3 | 11.6 | details | |||||
| DEC | Alpha 21164 | EV5 | EV5 | 1994-09-07 | 96 | 3.30 | 0.5 | 180.0 | 350.0 | 56.0 | 366.9 | 518.5 | 8.8 | 13.2 | details |