Motorola 68020 µarch
| Microarchitecture |
| µarch |
68020 |
| ISA |
|
| FP Pipe Stages |
|
| Int Pipe Stages |
|
|
Additional Specifications
|
| ISA Extensions |
|
| Max µops (per-cycle) |
|
| IFU |
|
| LSFU |
|
| FPFU |
|
| TFU |
|
| Max Inst. Decoded |
|
| ROB Size |
|
| Inst. Window |
|
| IF Queue |
|
|
Additional Specifications
|
| BHT Size |
|
| BTB Size |
|
| BP Acc |
|
| Registers (INT) |
|
| Registers (FP) |
|
| Registers (All) |
|
| Memory BW [MB/s] |
|
| Out of Order |
|
| Integrated Memory Ctrl |
|
| Designer |
Family |
Code Name |
Model |
μarch |
Released |
Cache |
Vdd |
Feature Size |
FO4 |
Clock |
TDP |
SPECInt 1992 |
SPECFp 1992 |
SPECInt 1995 |
SPECFp 1995 |
SPECInt 2000 |
SPECFp 2000 |
SPECInt 2006 |
SPECFp 2006 |
|
| Motorola |
68020
|
|
|
68020
|
1984-04-01 |
0 |
5.00 |
2.25 |
810.0
|
25.0 |
0.72 |
|
|
|
|
|
|
|
|
details |