Intel
Celeron
Covington,
300.0
MHz
Specifications
|
Designer |
Intel |
Family |
Celeron |
Model |
|
Code Name |
Covington |
Clock [MHz] |
300.0 |
Max Clock (Turbo) [MHz] |
|
Physical Details
|
Voltage (Nom.) [V] |
|
TDP [W] |
|
Die Size [mm²] |
|
Transistor [M] |
|
Architecture |
Data Path Width |
|
Cores per Chip |
1 |
Threads per Core |
1 |
Microarchitecture |
µarch |
P6:Pentium II |
ISA |
x86-32 |
FP Pipe Stages |
|
Int Pipe Stages |
14 |
Cache (on-chip) |
L1 Unified Cache |
|
L1 Instruction Cache |
16 |
L1 Data Cache |
16 |
L2 Cache |
|
L3 Cache |
|
Cache (off-chip) |
L1 Unified Cache |
|
L1 Instruction Cache |
|
L1 Data Cache |
|
L2 Cache |
|
L3 Cache |
|
Process Technology |
Fabricated By |
Intel |
Process |
P856 |
Technology |
CMOS |
Feature Size [μm] |
0.25 |
Channel Length [μm] |
0.2 |
Metal Layers |
5 |
Metal Type |
aluminum |
FO4 Delay [ps] |
72.0
|
SpecInt1995
Go |
M88ksim |
Gcc |
Compress |
Li |
Ijpeg |
Perl |
Vortex |
|
7.8 |
12.1 |
7.4 |
4.6 |
10.6 |
11.0 |
11.7 |
8.4 |
source |
5.8 |
11.3 |
7.1 |
4.6 |
9.4 |
10.9 |
12.0 |
8.5 |
source |
SpecFp1995
Tomcatv |
Swim |
Su2cor |
Hydro2d |
Mgrid |
Applu |
Turb3d |
Apsi |
Fpppp |
Wave5 |
|
7.0 |
10.6 |
4.3 |
4.6 |
4.9 |
5.3 |
7.0 |
8.5 |
6.3 |
4.6 |
source |
6.1 |
10.5 |
4.2 |
4.6 |
3.9 |
5.7 |
6.9 |
7.8 |
6.2 |
4.7 |
source |