| Specifications | |
|---|---|
| Designer | Intel |
| Family | 80486 DX4 |
| Model | |
| Code Name | |
| Clock [MHz] | 100.0 |
| Max Clock (Turbo) [MHz] | |
| Physical Details | |
|---|---|
| Voltage (Nom.) [V] | 3.30 |
| TDP [W] | 4.1 |
| Die Size [mm²] | 87 |
| Transistor [M] | 1.6 |
| Architecture | |
|---|---|
| Data Path Width | |
| Cores per Chip | 1 |
| Threads per Core | 1 |
| Cache (on-chip) | |
|---|---|
| L1 Unified Cache | 16 |
| L1 Instruction Cache | |
| L1 Data Cache | |
| L2 Cache | |
| L3 Cache | |
| Cache (off-chip) | |
|---|---|
| L1 Unified Cache | |
| L1 Instruction Cache | |
| L1 Data Cache | |
| L2 Cache | |
| L3 Cache | |
| Process Technology | |
|---|---|
| Fabricated By | Intel |
| Process | http://cpudb.stanford.edu/technologies/53 |
| Technology | BICMOS |
| Feature Size [μm] | 0.6 |
| Channel Length [μm] | 0.6 |
| Metal Layers | 4 |
| Metal Type | |
| FO4 Delay [ps] | 216.0 |
| Espresso | Li | Eqntott | Compress | Sc | Gcc | |
|---|---|---|---|---|---|---|
| 52.8 | 69.5 | 50.7 | 31.6 | 70.2 | 38.9 | source |
| Spice2g6 | Doduc | Mdljdp2 | Wave5 | Tomcatv | Ora | Alvinn | Ear | Mdljsp2 | Swm256 | Su2cor | Hydro2d | Nasa7 | Fpppp | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 34.5 | 26.3 | 27.9 | 17.6 | 27.9 | 33.3 | 45.9 | 47.2 | 13.6 | 15.3 | 26.1 | 26.2 | 25.0 | 25.8 | source |
| Mips | |
|---|---|
| 70.7 | source hidden |