| Specifications | |
|---|---|
| Designer | Intel |
| Family | 80486 DX2 |
| Model | |
| Code Name | |
| Clock [MHz] | 66.0 |
| Max Clock (Turbo) [MHz] | |
| Physical Details | |
|---|---|
| Voltage (Nom.) [V] | 5.00 |
| TDP [W] | 5.8 |
| Die Size [mm²] | 76 |
| Transistor [M] | |
| Architecture | |
|---|---|
| Data Path Width | |
| Cores per Chip | 1 |
| Threads per Core | 1 |
| Cache (on-chip) | |
|---|---|
| L1 Unified Cache | 8 |
| L1 Instruction Cache | |
| L1 Data Cache | |
| L2 Cache | |
| L3 Cache | |
| Cache (off-chip) | |
|---|---|
| L1 Unified Cache | |
| L1 Instruction Cache | |
| L1 Data Cache | |
| L2 Cache | |
| L3 Cache | |
| Process Technology | |
|---|---|
| Fabricated By | Intel |
| Process | http://cpudb.stanford.edu/technologies/54 |
| Technology | BICMOS |
| Feature Size [μm] | 0.8 |
| Channel Length [μm] | 0.8 |
| Metal Layers | |
| Metal Type | |
| FO4 Delay [ps] | 288.0 |
| Espresso | Li | Eqntott | Compress | Sc | Gcc | |
|---|---|---|---|---|---|---|
| 35.4 | 47.9 | 40.6 | 25.2 | 49.9 | 28.1 | source |
| Spice2g6 | Doduc | Mdljdp2 | Wave5 | Tomcatv | Ora | Alvinn | Ear | Mdljsp2 | Swm256 | Su2cor | Hydro2d | Nasa7 | Fpppp | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 23.0 | 17.0 | 18.7 | 11.7 | 19.5 | 22.3 | 31.7 | 30.2 | 9.0 | 9.9 | 19.9 | 18.7 | 18.4 | 18.0 | source |
| Mips | |
|---|---|
| 54.0 | source hidden |