Specifications | |
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Designer | Intel |
Family | 4004 |
Model | |
Code Name | |
Clock [MHz] | 0.108 |
Max Clock (Turbo) [MHz] |
Physical Details | |
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Voltage (Nom.) [V] | 15.00 |
TDP [W] | 0.5 |
Die Size [mm²] | 12 |
Transistor [M] | 0.0023 |
Architecture | |
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Data Path Width | 4 |
Cores per Chip | 1 |
Threads per Core | 1 |
Cache (on-chip) | |
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L1 Unified Cache | |
L1 Instruction Cache | |
L1 Data Cache | |
L2 Cache | |
L3 Cache |
Cache (off-chip) | |
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L1 Unified Cache | |
L1 Instruction Cache | |
L1 Data Cache | |
L2 Cache | |
L3 Cache |
Process Technology | |
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Fabricated By | Intel |
Process | http://cpudb.stanford.edu/technologies/73 |
Technology | PMOS |
Feature Size [μm] | 10.0 |
Channel Length [μm] | 10.0 |
Metal Layers | 2 |
Metal Type | |
FO4 Delay [ps] | 3600.0 |
Mips | |
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0.1 | source hidden |