IBM
PowerPC 602
66.0
MHz
Specifications
|
Designer |
IBM |
Family |
PowerPC 602 |
Model |
|
Code Name |
|
Clock [MHz] |
66.0 |
Max Clock (Turbo) [MHz] |
|
Physical Details
|
Voltage (Nom.) [V] |
3.30 |
TDP [W] |
1.2 |
Die Size [mm²] |
50 |
Transistor [M] |
1.0 |
Architecture |
Data Path Width |
32 |
Cores per Chip |
1 |
Threads per Core |
1 |
Microarchitecture |
µarch |
PowerPC 602 |
ISA |
|
FP Pipe Stages |
6 |
Int Pipe Stages |
4 |
Cache (on-chip) |
L1 Unified Cache |
|
L1 Instruction Cache |
1 |
L1 Data Cache |
4 |
L2 Cache |
|
L3 Cache |
|
Cache (off-chip) |
L1 Unified Cache |
|
L1 Instruction Cache |
|
L1 Data Cache |
|
L2 Cache |
|
L3 Cache |
|
Process Technology |
Fabricated By |
IBM |
Process |
CMOS-5X |
Technology |
CMOS |
Feature Size [μm] |
0.5 |
Channel Length [μm] |
0.45 |
Metal Layers |
4 |
Metal Type |
|
FO4 Delay [ps] |
222.5
|
Die Photo