Specifications | |
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Designer | AMD |
Family | Athlon 64 X2 |
Model | 6400+ |
Code Name | Brisbane |
Clock [MHz] | 3200.0 |
Max Clock (Turbo) [MHz] |
Physical Details | |
---|---|
Voltage (Nom.) [V] | 1.38 |
TDP [W] | 125.0 |
Die Size [mm²] | 230 |
Transistor [M] | 227.0 |
Architecture | |
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Data Path Width | 64 |
Cores per Chip | 2 |
Threads per Core | 1 |
Microarchitecture | |
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µarch | K8 |
ISA | x86-64 |
FP Pipe Stages | 17 |
Int Pipe Stages | 12 |
Cache (on-chip) | |
---|---|
L1 Unified Cache | |
L1 Instruction Cache | 64 |
L1 Data Cache | 64 |
L2 Cache | 2048 |
L3 Cache |
Cache (off-chip) | |
---|---|
L1 Unified Cache | |
L1 Instruction Cache | |
L1 Data Cache | |
L2 Cache | |
L3 Cache |
Process Technology | |
---|---|
Fabricated By | AMD |
Process | http://cpudb.stanford.edu/technologies/2 |
Technology | CMOS |
Feature Size [μm] | 0.065 |
Channel Length [μm] | 0.035 |
Metal Layers | 10 |
Metal Type | copper |
FO4 Delay [ps] | 12.6 |