IBM
Power2
P2SC,
160.0
MHz
|
Specifications
|
| Designer |
IBM |
| Family |
Power2 |
| Model |
|
| Code Name |
P2SC |
| Clock [MHz] |
160.0 |
| Max Clock (Turbo) [MHz] |
|
|
Physical Details
|
| Voltage (Nom.) [V] |
|
| TDP [W] |
|
| Die Size [mm²] |
|
| Transistor [M] |
|
| Architecture |
| Data Path Width |
32 |
| Cores per Chip |
1 |
| Threads per Core |
1 |
| Cache (on-chip) |
| L1 Unified Cache |
|
| L1 Instruction Cache |
32 |
| L1 Data Cache |
128 |
| L2 Cache |
|
| L3 Cache |
|
| Cache (off-chip) |
| L1 Unified Cache |
|
| L1 Instruction Cache |
|
| L1 Data Cache |
|
| L2 Cache |
|
| L3 Cache |
|
| Process Technology |
| Fabricated By |
IBM |
| Process |
CMOS-6S2 |
| Technology |
CMOS |
| Feature Size [μm] |
0.25 |
| Channel Length [μm] |
0.18 |
| Metal Layers |
5 |
| Metal Type |
aluminum |
| FO4 Delay [ps] |
93.3
|
SpecFp1995
| Tomcatv |
Swim |
Su2cor |
Hydro2d |
Mgrid |
Applu |
Turb3d |
Apsi |
Fpppp |
Wave5 |
|
| 46.9 |
56.5 |
10.5 |
12.9 |
22.8 |
23.2 |
22.7 |
11.5 |
35.1 |
30.1 |
source |