HP
PA-7150
99.0
MHz
Specifications
|
Designer |
HP |
Family |
PA-7150 |
Model |
|
Code Name |
|
Clock [MHz] |
99.0 |
Max Clock (Turbo) [MHz] |
|
Physical Details
|
Voltage (Nom.) [V] |
|
TDP [W] |
|
Die Size [mm²] |
|
Transistor [M] |
|
Architecture |
Data Path Width |
|
Cores per Chip |
1 |
Threads per Core |
1 |
Cache (on-chip) |
L1 Unified Cache |
|
L1 Instruction Cache |
|
L1 Data Cache |
|
L2 Cache |
|
L3 Cache |
|
Cache (off-chip) |
L1 Unified Cache |
|
L1 Instruction Cache |
256 |
L1 Data Cache |
256 |
L2 Cache |
|
L3 Cache |
|
Process Technology |
Fabricated By |
HP |
Process |
CMOS26B |
Technology |
CMOS |
Feature Size [μm] |
0.8 |
Channel Length [μm] |
0.8 |
Metal Layers |
3 |
Metal Type |
|
FO4 Delay [ps] |
297.0
|
SpecInt1992
Espresso |
Li |
Eqntott |
Compress |
Sc |
Gcc |
|
95.0 |
108.2 |
139.2 |
69.3 |
214.7 |
92.2 |
source |