Specifications | |
---|---|
Designer | Fujitsu |
Family | SPARC64 V |
Model | |
Code Name | Zeus |
Clock [MHz] | 1350.0 |
Max Clock (Turbo) [MHz] |
Physical Details | |
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Voltage (Nom.) [V] | |
TDP [W] | |
Die Size [mm²] | |
Transistor [M] |
Architecture | |
---|---|
Data Path Width | |
Cores per Chip | 1 |
Threads per Core | 1 |
Cache (on-chip) | |
---|---|
L1 Unified Cache | |
L1 Instruction Cache | 128 |
L1 Data Cache | 128 |
L2 Cache | 2048 |
L3 Cache |
Cache (off-chip) | |
---|---|
L1 Unified Cache | |
L1 Instruction Cache | |
L1 Data Cache | |
L2 Cache | |
L3 Cache |
Process Technology | |
---|---|
Fabricated By | unnamed |
Process | http://cpudb.stanford.edu/technologies/109 |
Technology | CMOS |
Feature Size [μm] | 0.13 |
Channel Length [μm] | |
Metal Layers | 8 |
Metal Type | copper |
FO4 Delay [ps] | 25.2 |
Gzip | Vpr | Gcc | Mcf | Crafty | Parser | Eon | Perlbmk | Gap | Vortex | Bzip2 | Twolf | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
636.0 | 685.0 | 711.0 | 673.0 | 856.0 | 680.0 | 592.0 | 883.0 | 707.0 | 1350.0 | 792.0 | 996.0 | source |
636.0 | 648.0 | 698.0 | 672.0 | 837.0 | 656.0 | 586.0 | 876.0 | 595.0 | 1240.0 | 780.0 | 895.0 | source |
632.0 | 675.0 | 707.0 | 644.0 | 851.0 | 673.0 | 595.0 | 879.0 | 700.0 | 1339.0 | 776.0 | 985.0 | source |
Wupwise | Swim | Mgrid | Applu | Mesa | Galgel | Art | Equake | Facerec | Ammp | Lucas | Fma3d | Sixtrack | Apsi | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
543.0 | 1412.0 | 957.0 | 805.0 | 526.0 | 2231.0 | 10197.0 | 1882.0 | 1318.0 | 712.0 | 1056.0 | 736.0 | 380.0 | 979.0 | source |
581.0 | 1263.0 | 854.0 | 782.0 | 613.0 | 2074.0 | 9242.0 | 1097.0 | 884.0 | 709.0 | 1093.0 | 789.0 | 399.0 | 774.0 | source |
512.0 | 1266.0 | 863.0 | 751.0 | 498.0 | 2219.0 | 10165.0 | 1767.0 | 1244.0 | 698.0 | 984.0 | 729.0 | 383.0 | 963.0 | source |