| Specifications | |
|---|---|
| Designer | Fujitsu |
| Family | SPARC64 V |
| Model | |
| Code Name | Zeus |
| Clock [MHz] | 1100.0 |
| Max Clock (Turbo) [MHz] | |
| Physical Details | |
|---|---|
| Voltage (Nom.) [V] | |
| TDP [W] | |
| Die Size [mm²] | |
| Transistor [M] | |
| Architecture | |
|---|---|
| Data Path Width | |
| Cores per Chip | 1 |
| Threads per Core | 1 |
| Cache (on-chip) | |
|---|---|
| L1 Unified Cache | |
| L1 Instruction Cache | 128 |
| L1 Data Cache | 128 |
| L2 Cache | 1024 |
| L3 Cache | |
| Cache (off-chip) | |
|---|---|
| L1 Unified Cache | |
| L1 Instruction Cache | |
| L1 Data Cache | |
| L2 Cache | |
| L3 Cache | |
| Process Technology | |
|---|---|
| Fabricated By | unnamed |
| Process | http://cpudb.stanford.edu/technologies/109 |
| Technology | CMOS |
| Feature Size [μm] | 0.13 |
| Channel Length [μm] | |
| Metal Layers | 8 |
| Metal Type | copper |
| FO4 Delay [ps] | 25.2 |
| Gzip | Vpr | Gcc | Mcf | Crafty | Parser | Eon | Perlbmk | Gap | Vortex | Bzip2 | Twolf | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 518.0 | 467.0 | 698.0 | 338.0 | 677.0 | 511.0 | 478.0 | 695.0 | 578.0 | 1017.0 | 567.0 | 639.0 | source |
| 527.0 | 468.0 | 703.0 | 340.0 | 677.0 | 511.0 | 475.0 | 700.0 | 579.0 | 1018.0 | 570.0 | 635.0 | source |
| Wupwise | Swim | Mgrid | Applu | Mesa | Galgel | Art | Equake | Facerec | Ammp | Lucas | Fma3d | Sixtrack | Apsi | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 439.0 | 1351.0 | 794.0 | 673.0 | 408.0 | 1474.0 | 6095.0 | 1543.0 | 1031.0 | 462.0 | 933.0 | 648.0 | 356.0 | 725.0 | source |
| 441.0 | 1406.0 | 807.0 | 684.0 | 403.0 | 1499.0 | 6249.0 | 1605.0 | 1053.0 | 464.0 | 991.0 | 664.0 | 356.0 | 745.0 | source |
| Score | Threads | Date | |
|---|---|---|---|
| 1309.1 | 1 | 2010-04-12 | source |