| Specifications | |
|---|---|
| Designer | Fujitsu |
| Family | SPARC64 V |
| Model | |
| Code Name | Zeus |
| Clock [MHz] | 1080.0 |
| Max Clock (Turbo) [MHz] | |
| Physical Details | |
|---|---|
| Voltage (Nom.) [V] | |
| TDP [W] | |
| Die Size [mm²] | |
| Transistor [M] | |
| Architecture | |
|---|---|
| Data Path Width | |
| Cores per Chip | 1 |
| Threads per Core | 1 |
| Cache (on-chip) | |
|---|---|
| L1 Unified Cache | |
| L1 Instruction Cache | 128 |
| L1 Data Cache | 128 |
| L2 Cache | 2048 |
| L3 Cache | |
| Cache (off-chip) | |
|---|---|
| L1 Unified Cache | |
| L1 Instruction Cache | |
| L1 Data Cache | |
| L2 Cache | |
| L3 Cache | |
| Process Technology | |
|---|---|
| Fabricated By | unnamed |
| Process | http://cpudb.stanford.edu/technologies/109 |
| Technology | CMOS |
| Feature Size [μm] | 0.13 |
| Channel Length [μm] | |
| Metal Layers | 8 |
| Metal Type | copper |
| FO4 Delay [ps] | 25.2 |
| Gzip | Vpr | Gcc | Mcf | Crafty | Parser | Eon | Perlbmk | Gap | Vortex | Bzip2 | Twolf | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 508.0 | 558.0 | 615.0 | 597.0 | 680.0 | 552.0 | 470.0 | 710.0 | 585.0 | 1107.0 | 645.0 | 789.0 | source |
| Wupwise | Swim | Mgrid | Applu | Mesa | Galgel | Art | Equake | Facerec | Ammp | Lucas | Fma3d | Sixtrack | Apsi | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 421.0 | 1259.0 | 801.0 | 666.0 | 401.0 | 1837.0 | 8242.0 | 1663.0 | 1074.0 | 578.0 | 956.0 | 645.0 | 315.0 | 804.0 | source |