Fujitsu
SPARC64 GP
810.0
MHz
Specifications
|
Designer |
Fujitsu |
Family |
SPARC64 GP |
Model |
|
Code Name |
|
Clock [MHz] |
810.0 |
Max Clock (Turbo) [MHz] |
|
Physical Details
|
Voltage (Nom.) [V] |
|
TDP [W] |
|
Die Size [mm²] |
|
Transistor [M] |
|
Architecture |
Data Path Width |
|
Cores per Chip |
1 |
Threads per Core |
1 |
Cache (on-chip) |
L1 Unified Cache |
|
L1 Instruction Cache |
128 |
L1 Data Cache |
128 |
L2 Cache |
|
L3 Cache |
|
Cache (off-chip) |
L1 Unified Cache |
|
L1 Instruction Cache |
|
L1 Data Cache |
|
L2 Cache |
8192 |
L3 Cache |
|
Process Technology |
Fabricated By |
Fujitsu |
Process |
CS-85 |
Technology |
CMOS |
Feature Size [μm] |
0.15 |
Channel Length [μm] |
|
Metal Layers |
6 |
Metal Type |
copper |
FO4 Delay [ps] |
29.5
|
SpecInt2000
Gzip |
Vpr |
Gcc |
Mcf |
Crafty |
Parser |
Eon |
Perlbmk |
Gap |
Vortex |
Bzip2 |
Twolf |
|
467.0 |
463.0 |
261.0 |
595.0 |
516.0 |
541.0 |
636.0 |
594.0 |
320.0 |
809.0 |
558.0 |
634.0 |
source |
459.0 |
458.0 |
234.0 |
567.0 |
516.0 |
539.0 |
636.0 |
591.0 |
311.0 |
795.0 |
556.0 |
633.0 |
source |
467.0 |
463.0 |
261.0 |
595.0 |
516.0 |
541.0 |
636.0 |
594.0 |
320.0 |
809.0 |
558.0 |
634.0 |
source |
459.0 |
458.0 |
234.0 |
567.0 |
516.0 |
539.0 |
636.0 |
591.0 |
311.0 |
795.0 |
556.0 |
633.0 |
source |
SpecFp2000
Wupwise |
Swim |
Mgrid |
Applu |
Mesa |
Galgel |
Art |
Equake |
Facerec |
Ammp |
Lucas |
Fma3d |
Sixtrack |
Apsi |
|
338.0 |
536.0 |
390.0 |
266.0 |
301.0 |
1126.0 |
2316.0 |
487.0 |
660.0 |
419.0 |
454.0 |
351.0 |
275.0 |
436.0 |
source |
325.0 |
458.0 |
356.0 |
242.0 |
299.0 |
1120.0 |
2232.0 |
444.0 |
652.0 |
418.0 |
402.0 |
326.0 |
275.0 |
424.0 |
source |
338.0 |
536.0 |
390.0 |
266.0 |
301.0 |
1126.0 |
2316.0 |
487.0 |
660.0 |
419.0 |
454.0 |
351.0 |
275.0 |
436.0 |
source |
325.0 |
458.0 |
356.0 |
242.0 |
299.0 |
1120.0 |
2232.0 |
444.0 |
652.0 |
418.0 |
402.0 |
326.0 |
275.0 |
424.0 |
source |