Fujitsu
SPARC64 GP
501.0
MHz
|
Specifications
|
| Designer |
Fujitsu |
| Family |
SPARC64 GP |
| Model |
|
| Code Name |
|
| Clock [MHz] |
501.0 |
| Max Clock (Turbo) [MHz] |
|
|
Physical Details
|
| Voltage (Nom.) [V] |
|
| TDP [W] |
|
| Die Size [mm²] |
|
| Transistor [M] |
|
| Architecture |
| Data Path Width |
|
| Cores per Chip |
1 |
| Threads per Core |
1 |
| Cache (on-chip) |
| L1 Unified Cache |
|
| L1 Instruction Cache |
128 |
| L1 Data Cache |
128 |
| L2 Cache |
|
| L3 Cache |
|
| Cache (off-chip) |
| L1 Unified Cache |
|
| L1 Instruction Cache |
|
| L1 Data Cache |
|
| L2 Cache |
4096 |
| L3 Cache |
|
| Process Technology |
| Fabricated By |
Fujitsu |
| Process |
CS-80 |
| Technology |
CMOS |
| Feature Size [μm] |
0.18 |
| Channel Length [μm] |
|
| Metal Layers |
6 |
| Metal Type |
copper |
| FO4 Delay [ps] |
36.0
|
SpecInt2000
| Gzip |
Vpr |
Gcc |
Mcf |
Crafty |
Parser |
Eon |
Perlbmk |
Gap |
Vortex |
Bzip2 |
Twolf |
|
| 308.0 |
283.0 |
230.0 |
289.0 |
340.0 |
319.0 |
348.0 |
356.0 |
212.0 |
491.0 |
315.0 |
303.0 |
source |
| 309.0 |
299.0 |
246.0 |
398.0 |
339.0 |
337.0 |
341.0 |
363.0 |
214.0 |
508.0 |
335.0 |
303.0 |
source |
| 307.0 |
288.0 |
240.0 |
389.0 |
340.0 |
336.0 |
330.0 |
364.0 |
210.0 |
504.0 |
334.0 |
304.0 |
source |
| 308.0 |
283.0 |
230.0 |
289.0 |
340.0 |
319.0 |
348.0 |
356.0 |
212.0 |
491.0 |
315.0 |
303.0 |
source |
| 309.0 |
299.0 |
246.0 |
398.0 |
339.0 |
337.0 |
341.0 |
363.0 |
214.0 |
508.0 |
335.0 |
303.0 |
source |
| 307.0 |
288.0 |
240.0 |
389.0 |
340.0 |
336.0 |
330.0 |
364.0 |
210.0 |
504.0 |
334.0 |
304.0 |
source |