CPU DB

Intel Xeon E5-4650L

Sandy Bridge EP, 2600.0 MHz

Specifications
Designer Intel
Family Xeon
Model E5-4650L
Code Name Sandy Bridge EP
Clock [MHz] 2600.0
Max Clock (Turbo) [MHz] 3100.0
Physical Details
Voltage (Nom.) [V] 0.98
TDP [W] 115.0
Die Size [mm²]
Transistor [M]
Architecture
Data Path Width
Cores per Chip 8
Threads per Core 2
Cache (on-chip)
L1 Unified Cache
L1 Instruction Cache
L1 Data Cache
L2 Cache
L3 Cache
Cache (off-chip)
L1 Unified Cache
L1 Instruction Cache
L1 Data Cache
L2 Cache
L3 Cache

    SpecInt2006

    Perlbench Bzip2 Gcc Mcf Gobmk Hmmer Sjeng Libquantum H264ref Omnetpp Astar Xalancbmk
    27.5 20.4 28.0 58.9 21.9 46.7 24.8 2850.0 39.9 23.8 27.5 47.4 source
    27.5 20.4 28.0 58.9 21.9 46.7 24.8 2850.0 39.9 23.8 27.5 47.4 source
    27.6 20.5 28.1 59.1 22.0 46.8 24.7 3780.0 39.6 24.0 27.5 47.7 source
    27.6 20.7 30.0 61.2 21.6 47.5 25.7 2930.0 40.1 24.3 27.4 47.2 source
    27.6 20.6 29.7 61.5 21.7 47.0 25.8 3650.0 40.0 25.9 27.2 47.7 source
    27.5 20.6 29.8 61.5 21.8 47.1 25.8 2850.0 39.9 25.4 26.8 47.9 source

    SpecFp2006

    Bwaves Gamess Milc Zeusmp Gromacs Cactusadm Leslie3d Namd Dealii Soplex Povray Calculix Gemsfdtd Tonto Lbm Wrf Sphinx3
    546.0 23.7 56.0 107.0 14.3 286.0 103.0 21.1 47.0 40.2 39.3 30.9 121.0 30.3 707.0 34.2 57.6 source
    546.0 23.7 56.0 107.0 14.3 286.0 103.0 21.1 47.0 40.2 39.3 30.9 121.0 30.3 707.0 34.2 57.6 source
    550.0 23.8 56.1 108.0 14.4 286.0 105.0 21.2 46.9 40.3 39.7 31.0 122.0 30.3 707.0 34.7 57.1 source
    538.0 26.6 57.1 111.0 32.0 268.0 106.0 21.1 50.9 39.4 39.9 32.3 117.0 33.8 680.0 43.1 60.8 source
    526.0 24.7 59.6 107.0 12.7 344.0 104.0 21.2 47.6 41.9 39.2 31.8 125.0 30.5 532.0 41.1 60.5 source
    593.0 24.2 56.4 111.0 12.7 338.0 169.0 21.2 47.4 41.1 39.3 32.0 133.0 30.4 880.0 41.8 59.3 source
    594.0 24.2 56.8 111.0 12.7 334.0 167.0 21.2 47.5 41.4 39.1 32.0 133.0 30.6 880.0 42.2 59.6 source