Fujitsu
SPARC64 GP
360.0
MHz
Specifications
|
Designer |
Fujitsu |
Family |
SPARC64 GP |
Model |
|
Code Name |
|
Clock [MHz] |
360.0 |
Max Clock (Turbo) [MHz] |
|
Physical Details
|
Voltage (Nom.) [V] |
2.60 |
TDP [W] |
25.0 |
Die Size [mm²] |
|
Transistor [M] |
|
Architecture |
Data Path Width |
64 |
Cores per Chip |
1 |
Threads per Core |
1 |
Cache (on-chip) |
L1 Unified Cache |
|
L1 Instruction Cache |
128 |
L1 Data Cache |
128 |
L2 Cache |
|
L3 Cache |
|
Cache (off-chip) |
L1 Unified Cache |
|
L1 Instruction Cache |
|
L1 Data Cache |
|
L2 Cache |
4096 |
L3 Cache |
|
Process Technology |
Fabricated By |
Fujitsu |
Process |
CS-80 |
Technology |
CMOS |
Feature Size [μm] |
0.18 |
Channel Length [μm] |
|
Metal Layers |
6 |
Metal Type |
copper |
FO4 Delay [ps] |
36.0
|