Intel
Itanium
9050
Montecito,
1600.0
MHz
Specifications
|
Designer |
Intel |
Family |
Itanium |
Model |
9050 |
Code Name |
Montecito |
Clock [MHz] |
1600.0 |
Max Clock (Turbo) [MHz] |
|
Physical Details
|
Voltage (Nom.) [V] |
1.17 |
TDP [W] |
104.0 |
Die Size [mm²] |
596 |
Transistor [M] |
1720.0 |
Architecture |
Data Path Width |
|
Cores per Chip |
2 |
Threads per Core |
1 |
Cache (on-chip) |
L1 Unified Cache |
|
L1 Instruction Cache |
|
L1 Data Cache |
|
L2 Cache |
24576 |
L3 Cache |
|
Cache (off-chip) |
L1 Unified Cache |
|
L1 Instruction Cache |
|
L1 Data Cache |
|
L2 Cache |
|
L3 Cache |
|
Process Technology |
Fabricated By |
Intel |
Process |
P1262 |
Technology |
CMOS |
Feature Size [μm] |
0.09 |
Channel Length [μm] |
0.053 |
Metal Layers |
7 |
Metal Type |
copper |
FO4 Delay [ps] |
19.1
|