CPU DB

Intel Xeon W5580

Nehalem EP, 3200.0 MHz

Specifications
Designer Intel
Family Xeon
Model W5580
Code Name Nehalem EP
Clock [MHz] 3200.0
Max Clock (Turbo) [MHz] 3460.0
Physical Details
Voltage (Nom.) [V] 1.05
TDP [W] 130.0
Die Size [mm²] 263
Transistor [M] 731.0
Architecture
Data Path Width 64
Cores per Chip 4
Threads per Core 2
Microarchitecture
µarch Nehalem
ISA x86-64
FP Pipe Stages 16
Int Pipe Stages 16
Cache (on-chip)
L1 Unified Cache
L1 Instruction Cache 32
L1 Data Cache 32
L2 Cache 1024
L3 Cache 8192
Cache (off-chip)
L1 Unified Cache
L1 Instruction Cache
L1 Data Cache
L2 Cache
L3 Cache
Process Technology
Fabricated By Intel
Process http://cpudb.stanford.edu/technologies/61
Technology CMOS
Feature Size [μm] 0.045
Channel Length [μm] 0.035
Metal Layers 9
Metal Type copper
FO4 Delay [ps] 12.6

    SpecInt2006

    Perlbench Bzip2 Gcc Mcf Gobmk Hmmer Sjeng Libquantum H264ref Omnetpp Astar Xalancbmk
    25.0 18.2 27.6 49.7 23.6 24.0 25.7 316.0 37.5 24.1 18.6 37.3 source
    24.0 18.5 25.8 48.2 23.9 24.1 25.5 331.0 37.6 23.0 18.2 30.2 source
    24.6 18.2 27.0 48.7 23.3 23.8 25.4 313.0 37.1 23.1 18.4 36.1 source
    25.2 18.5 29.3 50.0 23.8 24.2 26.0 223.0 37.9 25.6 18.6 38.3 source
    25.0 18.3 27.3 49.0 23.6 23.9 25.5 322.0 37.8 23.8 18.6 37.2 source

    SpecFp2006

    Bwaves Gamess Milc Zeusmp Gromacs Cactusadm Leslie3d Namd Dealii Soplex Povray Calculix Gemsfdtd Tonto Lbm Wrf Sphinx3
    99.4 25.5 39.5 33.5 24.5 191.0 31.0 20.6 36.4 31.5 30.6 29.5 48.6 27.4 56.0 43.3 44.6 source
    80.8 25.1 29.1 32.9 25.1 98.8 34.3 20.5 28.5 29.6 31.1 28.9 42.7 27.2 57.8 43.5 45.0 source
    97.5 25.2 37.7 32.3 24.4 185.0 30.1 20.4 36.1 30.5 30.4 29.5 47.3 26.9 54.4 42.4 44.6 source
    94.3 26.7 41.4 37.7 24.7 109.0 35.0 20.4 36.7 32.5 30.6 30.6 46.7 28.0 61.6 46.8 45.5 source
    99.0 25.5 39.3 33.0 24.7 191.0 34.5 20.6 36.5 31.1 30.5 29.4 43.9 27.3 54.0 43.4 44.6 source