CPU DB

AMD Turion 64 X2 TL-60

Tyler, 2000.0 MHz

Specifications
Designer AMD
Family Turion 64 X2
Model TL-60
Code Name Tyler
Clock [MHz] 2000.0
Max Clock (Turbo) [MHz]
Physical Details
Voltage (Nom.) [V] 1.13
TDP [W] 31.0
Die Size [mm²] 126
Transistor [M] 153.8
Architecture
Data Path Width 64
Cores per Chip 2
Threads per Core 1
Microarchitecture
µarch K8
ISA x86-64
FP Pipe Stages 17
Int Pipe Stages 12
Cache (on-chip)
L1 Unified Cache
L1 Instruction Cache 64
L1 Data Cache 64
L2 Cache 1024
L3 Cache
Cache (off-chip)
L1 Unified Cache
L1 Instruction Cache
L1 Data Cache
L2 Cache
L3 Cache
Process Technology
Fabricated By AMD
Process http://cpudb.stanford.edu/technologies/2
Technology CMOS
Feature Size [μm] 0.065
Channel Length [μm] 0.035
Metal Layers 10
Metal Type copper
FO4 Delay [ps] 12.6

    SpecInt2006

    Perlbench Bzip2 Gcc Mcf Gobmk Hmmer Sjeng Libquantum H264ref Omnetpp Astar Xalancbmk
    10.1 6.5 6.1 8.0 11.7 3.2 9.0 9.1 11.2 7.3 6.3 8.7 source
    9.9 6.5 6.1 8.2 11.4 3.2 8.6 9.3 10.9 7.6 6.3 8.5 source

    SpecFp2006

    Bwaves Gamess Milc Zeusmp Gromacs Cactusadm Leslie3d Namd Dealii Soplex Povray Calculix Gemsfdtd Tonto Lbm Wrf Sphinx3
    11.5 9.8 8.1 8.4 4.8 7.3 5.5 8.5 8.4 6.7 12.0 3.0 5.7 4.4 8.9 7.1 8.9 source
    11.6 9.5 8.3 8.4 4.7 7.0 5.5 8.2 8.3 6.8 11.8 2.9 5.8 4.4 9.0 7.0 9.0 source