Intel
Xeon
7110N
Tulsa,
2500.0
MHz
Specifications
|
Designer |
Intel |
Family |
Xeon |
Model |
7110N |
Code Name |
Tulsa |
Clock [MHz] |
2500.0 |
Max Clock (Turbo) [MHz] |
|
Physical Details
|
Voltage (Nom.) [V] |
1.23 |
TDP [W] |
95.0 |
Die Size [mm²] |
435 |
Transistor [M] |
1328.0 |
Architecture |
Data Path Width |
|
Cores per Chip |
2 |
Threads per Core |
2 |
Cache (on-chip) |
L1 Unified Cache |
|
L1 Instruction Cache |
|
L1 Data Cache |
|
L2 Cache |
4096 |
L3 Cache |
|
Cache (off-chip) |
L1 Unified Cache |
|
L1 Instruction Cache |
|
L1 Data Cache |
|
L2 Cache |
|
L3 Cache |
|
SpecInt2006
Perlbench |
Bzip2 |
Gcc |
Mcf |
Gobmk |
Hmmer |
Sjeng |
Libquantum |
H264ref |
Omnetpp |
Astar |
Xalancbmk |
|
9.0 |
6.7 |
6.1 |
9.1 |
6.9 |
5.4 |
5.8 |
10.1 |
14.2 |
5.8 |
5.8 |
9.8 |
source |
9.0 |
6.7 |
6.2 |
9.0 |
6.9 |
5.4 |
5.8 |
10.1 |
14.2 |
5.9 |
5.8 |
9.8 |
source |
9.0 |
6.7 |
6.2 |
9.0 |
6.9 |
5.4 |
5.8 |
10.1 |
14.2 |
5.9 |
5.8 |
9.7 |
source |