| Microarchitecture | |
|---|---|
| µarch | UltraSPARC |
| ISA | |
| FP Pipe Stages | 9 |
| Int Pipe Stages | 9 |
| Additional Specifications | |
|---|---|
| ISA Extensions | |
| Max µops (per-cycle) | 4 |
| IFU | 2 |
| LSFU | 1 |
| FPFU | 5 |
| TFU | 9 |
| Max Inst. Decoded | 4 |
| ROB Size | |
| Inst. Window | 4 |
| IF Queue | 12 |
| Additional Specifications | |
|---|---|
| BHT Size | 2048 |
| BTB Size | 1024 |
| BP Acc | |
| Registers (INT) | 32 |
| Registers (FP) | 32 |
| Registers (All) | |
| Memory BW [MB/s] | |
| Out of Order | false |
| Integrated Memory Ctrl | |
| Designer | Family | Code Name | Model | μarch | Released | Cache | Vdd | Feature Size | FO4 | Clock | TDP | SPECInt 1992 | SPECFp 1992 | SPECInt 1995 | SPECFp 1995 | SPECInt 2000 | SPECFp 2000 | SPECInt 2006 | SPECFp 2006 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Sun | UltraSPARC | Spitfire | UltraSPARC | 1995-11-01 | 32 | 3.30 | 0.5 | 180.0 | 143.0 | 4.8 | 7.8 | details | ||||||||
| Sun | UltraSPARC | Spitfire | UltraSPARC | 1995-11-01 | 32 | 3.30 | 0.5 | 180.0 | 167.0 | 5.5 | 8.8 | details | ||||||||
| Sun | UltraSPARC | Spitfire | UltraSPARC | 1995-11-01 | 32 | 3.30 | 0.5 | 180.0 | 200.0 | 6.8 | 10.4 | details | ||||||||
| Sun | UltraSPARC | Spitfire | UltraSPARC | 1995-11-01 | 32 | 3.30 | 0.5 | 180.0 | 248.0 | 8.6 | 13.6 | details | ||||||||
| Sun | UltraSPARC | Spitfire | UltraSPARC | 1995-11-01 | 32 | 3.30 | 0.5 | 180.0 | 296.0 | 10.3 | 16.7 | details |