MIPS R2000 µarch
Microarchitecture |
µarch |
R2000 |
ISA |
|
FP Pipe Stages |
|
Int Pipe Stages |
5 |
Additional Specifications
|
ISA Extensions |
|
Max µops (per-cycle) |
1 |
IFU |
1 |
LSFU |
1 |
FPFU |
0 |
TFU |
2 |
Max Inst. Decoded |
1 |
ROB Size |
|
Inst. Window |
|
IF Queue |
|
Additional Specifications
|
BHT Size |
|
BTB Size |
|
BP Acc |
|
Registers (INT) |
32 |
Registers (FP) |
|
Registers (All) |
32 |
Memory BW [MB/s] |
|
Out of Order |
false |
Integrated Memory Ctrl |
false |
Designer |
Family |
Code Name |
Model |
μarch |
Released |
Cache |
Vdd |
Feature Size |
FO4 |
Clock |
TDP |
SPECInt 1992 |
SPECFp 1992 |
SPECInt 1995 |
SPECFp 1995 |
SPECInt 2000 |
SPECFp 2000 |
SPECInt 2006 |
SPECFp 2006 |
|
MIPS |
R2000
|
|
|
R2000
|
1986-01-01 |
0 |
5.00 |
2.0 |
720.0
|
16.0 |
3.0 |
|
|
|
|
|
|
|
|
details |