CPU DB

SGI R12000 µarch

Microarchitecture
µarch R12000
ISA
FP Pipe Stages 8
Int Pipe Stages 6
Additional Specifications
ISA Extensions
Max µops (per-cycle) 5
IFU 2
LSFU 1
FPFU 3
TFU 6
Max Inst. Decoded 4
ROB Size 48
Inst. Window 5
IF Queue
Additional Specifications
BHT Size 2048
BTB Size 2048
BP Acc
Registers (INT) 32
Registers (FP) 32
Registers (All) 64
Memory BW [MB/s]
Out of Order true
Integrated Memory Ctrl false

Designer Family Code Name Model μarch Released Cache Vdd Feature Size FO4 Clock TDP SPECInt 1992 SPECFp 1992 SPECInt 1995 SPECFp 1995 SPECInt 2000 SPECFp 2000 SPECInt 2006 SPECFp 2006
SGI R12000 R12000 1998-11-01 64 2.50 0.25 90.0 270.0 14.9 23.7 details
SGI R12000 R12000 1998-11-01 64 2.50 0.25 90.0 300.0 30.0 details
SGI R12000 R12000 1998-11-01 64 2.50 0.25 90.0 350.0 280.0 278.0 details
SGI R12000 R12000 1998-11-01 64 2.50 0.25 90.0 360.0 277.0 274.0 details