| Microarchitecture | |
|---|---|
| µarch | Mckinley |
| ISA | IA-64 |
| FP Pipe Stages | 10 |
| Int Pipe Stages | 10 |
| Additional Specifications | |
|---|---|
| ISA Extensions | |
| Max µops (per-cycle) | 20 |
| IFU | 4 |
| LSFU | 2 |
| FPFU | 4 |
| TFU | 17 |
| Max Inst. Decoded | 6 |
| ROB Size | |
| Inst. Window | 6 |
| IF Queue | 24 |
| Additional Specifications | |
|---|---|
| BHT Size | 20000 |
| BTB Size | 64 |
| BP Acc | |
| Registers (INT) | 1064 |
| Registers (FP) | 128 |
| Registers (All) | |
| Memory BW [MB/s] | |
| Out of Order | |
| Integrated Memory Ctrl | |
| Designer | Family | Code Name | Model | μarch | Released | Cache | Vdd | Feature Size | FO4 | Clock | TDP | SPECInt 1992 | SPECFp 1992 | SPECInt 1995 | SPECFp 1995 | SPECInt 2000 | SPECFp 2000 | SPECInt 2006 | SPECFp 2006 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Intel | Itanium 2 | Mckinley | 1000 | Mckinley | 2002-07-01 | 3072 | 1.50 | 0.18 | 46.8 | 1000.0 | 130.0 | details | ||||||||
| Intel | Itanium 2 | Mckinley | Mckinley | 1536 | 0.18 | 46.8 | 900.0 | 671.0 | 1109.1 | details |