| Microarchitecture | |
|---|---|
| µarch | PA-7300LC |
| ISA | |
| FP Pipe Stages | 6 |
| Int Pipe Stages | 6 |
| Additional Specifications | |
|---|---|
| ISA Extensions | |
| Max µops (per-cycle) | 2 |
| IFU | 2 |
| LSFU | 1 |
| FPFU | 1 |
| TFU | 3 |
| Max Inst. Decoded | 2 |
| ROB Size | |
| Inst. Window | |
| IF Queue | |
| Additional Specifications | |
|---|---|
| BHT Size | |
| BTB Size | |
| BP Acc | |
| Registers (INT) | |
| Registers (FP) | |
| Registers (All) | |
| Memory BW [MB/s] | |
| Out of Order | false |
| Integrated Memory Ctrl | false |
| Designer | Family | Code Name | Model | μarch | Released | Cache | Vdd | Feature Size | FO4 | Clock | TDP | SPECInt 1992 | SPECFp 1992 | SPECInt 1995 | SPECFp 1995 | SPECInt 2000 | SPECFp 2000 | SPECInt 2006 | SPECFp 2006 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| HP | PA-7300LC | PA-7300LC | 1996-09-01 | 128 | 0.5 | 180.0 | 132.0 | 6.1 | 6.5 | details | ||||||||||
| HP | PA-7300LC | PA-7300LC | 1996-09-01 | 128 | 3.30 | 0.5 | 180.0 | 160.0 | 15.0 | 7.3 | 7.4 | details | ||||||||
| HP | PA-7300LC | PA-7300LC | 1996-09-01 | 128 | 0.5 | 180.0 | 180.0 | 8.6 | 9.2 | details |