Sun UltraSPARC IIIi

Jalepeno, 1062.0 MHz

Specifications
Designer Sun
Family UltraSPARC IIIi
Model
Code Name Jalepeno
Clock [MHz] 1062.0
Max Clock (Turbo) [MHz]
Physical Details
Voltage (Nom.) [V] 1.30
TDP [W] 52.0
Die Size [mm²] 206
Transistor [M] 87.5
Architecture
Data Path Width 64
Cores per Chip 1
Threads per Core 1
Cache (on-chip)
L1 Unified Cache
L1 Instruction Cache 32
L1 Data Cache 64
L2 Cache 1024
L3 Cache
Cache (off-chip)
L1 Unified Cache
L1 Instruction Cache
L1 Data Cache
L2 Cache
L3 Cache
Process Technology
Fabricated By TI
Process http://cpudb.stanford.edu/technologies/103
Technology CMOS
Feature Size [μm] 0.13
Channel Length [μm]
Metal Layers 7
Metal Type copper
FO4 Delay [ps] 25.2

    SpecInt2000

    Gzip Vpr Gcc Mcf Crafty Parser Eon Perlbmk Gap Vortex Bzip2 Twolf
    449.0 444.0 572.0 297.0 603.0 452.0 667.0 559.0 445.0 818.0 478.0 552.0 source

    SpecFp2000

    Wupwise Swim Mgrid Applu Mesa Galgel Art Equake Facerec Ammp Lucas Fma3d Sixtrack Apsi
    812.0 850.0 579.0 643.0 589.0 1239.0 6751.0 1255.0 922.0 393.0 332.0 479.0 365.0 605.0 source