IBM PowerPC 602 µarch

Microarchitecture
µarch PowerPC 602
ISA
FP Pipe Stages 6
Int Pipe Stages 4
Additional Specifications
ISA Extensions
Max µops (per-cycle) 1
IFU 1
LSFU 1
FPFU 1
TFU 5
Max Inst. Decoded 1
ROB Size 4
Inst. Window
IF Queue 4
Additional Specifications
BHT Size
BTB Size
BP Acc
Registers (INT)
Registers (FP)
Registers (All)
Memory BW [MB/s]
Out of Order true
Integrated Memory Ctrl

Designer Family Code Name Model μarch Released Cache Vdd Feature Size FO4 Clock TDP SPECInt 1992 SPECFp 1992 SPECInt 1995 SPECFp 1995 SPECInt 2000 SPECFp 2000 SPECInt 2006 SPECFp 2006
IBM PowerPC 602 PowerPC 602 1995-02-01 5 3.30 0.5 222.5 66.0 1.2 details