DEC EV4 µarch

Microarchitecture
µarch EV4
ISA Alpha
FP Pipe Stages 10
Int Pipe Stages 7
Additional Specifications
ISA Extensions
Max µops (per-cycle) 2
IFU 1
LSFU 1
FPFU 1
TFU 3
Max Inst. Decoded 2
ROB Size
Inst. Window
IF Queue
Additional Specifications
BHT Size 2048
BTB Size
BP Acc 0
Registers (INT) 32
Registers (FP) 32
Registers (All) 32
Memory BW [MB/s] 1600
Out of Order false
Integrated Memory Ctrl

Designer Family Code Name Model μarch Released Cache Vdd Feature Size FO4 Clock TDP SPECInt 1992 SPECFp 1992 SPECInt 1995 SPECFp 1995 SPECInt 2000 SPECFp 2000 SPECInt 2006 SPECFp 2006
DEC Alpha 21064 EV4 EV4 1992-10-01 16 3.30 0.75 270.0 100.0 30.0 68.6 90.6 1.5 2.5 details
DEC Alpha 21064 EV4 EV4 1992-10-01 16 3.30 0.75 270.0 125.0 30.0 63.1 73.1 details
DEC Alpha 21064 EV4 EV4 1992-10-01 16 3.30 0.75 270.0 150.0 30.0 2.1 3.6 details
DEC Alpha 21064 EV4 EV4 1992-10-01 16 3.30 0.75 270.0 166.0 30.0 90.7 112.4 2.4 3.3 details
DEC Alpha 21064 EV4 EV4 1992-10-01 16 3.30 0.75 270.0 175.0 30.0 82.0 97.2 details
DEC Alpha 21064 EV4 EV4 1992-10-01 16 3.30 0.75 270.0 190.0 30.0 118.0 153.1 details
DEC Alpha 21064 EV4 EV4 1992-10-01 16 3.30 0.75 270.0 200.0 30.0 126.7 172.3 details