Intel Madison µarch

Microarchitecture
µarch Madison
ISA IA-64
FP Pipe Stages
Int Pipe Stages
Additional Specifications
ISA Extensions
Max µops (per-cycle)
IFU
LSFU
FPFU
TFU
Max Inst. Decoded
ROB Size
Inst. Window
IF Queue
Additional Specifications
BHT Size
BTB Size
BP Acc
Registers (INT)
Registers (FP)
Registers (All)
Memory BW [MB/s]
Out of Order
Integrated Memory Ctrl

Designer Family Code Name Model μarch Released Cache Vdd Feature Size FO4 Clock TDP SPECInt 1992 SPECFp 1992 SPECInt 1995 SPECFp 1995 SPECInt 2000 SPECFp 2000 SPECInt 2006 SPECFp 2006