Phillip Stanley-Marbell at IBM Research have created an interactive visualization tool: Interactive CPUDB
Below are a few other interesting plots we have created with CPUDB data. These interactive plots are generated on-the-fly, using the most recent data in CPUDB.
Have ideas for other interesting plots that would help showcase the database?
Let us know.
FO4 per Cycle
Gate delays per clock cycle.
Shows the scaling of maximum clock frequency over time, with a clear flattening circa 2005.
Shows the base SPECInt2006 cores over the last few years. Somewhat surprisingly, the frontier of maximum single-core performance has continued increasing well past 2006, when many predicted the end of single-core performance scaling.
Performance By Freq And Cache
This double-axis plot breaks down single-core performance of modern processors by frequency and cache size, clearly indicating that both positively impact performance.
Plots minimum transistor feature sizes over time (widely known as Moore's Law).
Technology Scaling By Manufacturer
Plots minimum transistor feature sizes over time, separated by manufacturer. This suggests that the industry as a whole has maintained similar scaling trends.