CPU DB

HP PA-7300LC

180.0 MHz

Specifications
Designer HP
Family PA-7300LC
Model
Code Name
Clock [MHz] 180.0
Max Clock (Turbo) [MHz]
Physical Details
Voltage (Nom.) [V]
TDP [W]
Die Size [mm²]
Transistor [M]
Architecture
Data Path Width 32
Cores per Chip 1
Threads per Core 1
Microarchitecture
µarch PA-7300LC
ISA
FP Pipe Stages 6
Int Pipe Stages 6
Cache (on-chip)
L1 Unified Cache
L1 Instruction Cache 64
L1 Data Cache 64
L2 Cache
L3 Cache
Cache (off-chip)
L1 Unified Cache
L1 Instruction Cache
L1 Data Cache
L2 Cache 1024
L3 Cache
Process Technology
Fabricated By HP
Process CMOS14C
Technology CMOS
Feature Size [μm] 0.5
Channel Length [μm] 0.5
Metal Layers 4
Metal Type
FO4 Delay [ps] 180.0

    Die Photo

    256

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